Paper 2002/031 Original: eprint.iacr.org/2002/031 ↗

A Parallelizable Design Principle for Cryptographic Hash Functions

Palash Sarkar
Paul J. Schellenberg
Abstract

We describe a parallel design principle for hash functions. Given a secure hash function $h:\{0,1\}^n\rightarrow \{0,1\}^m$ with $n\geq 2m$, and a binary tree of $2^t$ processors we show how to construct a secure hash function $h^{*}$ which can hash messages of lengths less than $2^{n-m}$ and a secure hash function $h^{\infty}$ which can hash messages of arbitrary length. The number of parallel rounds required to hash a message of length $L$ is $\lfloor\frac{L}{2^t}\rfloor+t+2$. Further, our algorithm is incrementally parallelizable in the following sense : given a digest produced using a binary tree of $2^t$ processors, we show that the same digest can also be produced using a binary tree of $2^{t^{\prime}}$ $(0\leq t^{\prime}\leq t)$ processors.

Metadata
Available format(s)
PDF
Category
Foundations
Publication info
Preprint.
History
2002-08-02: last updated
2002-03-12: published
Short URL
https://ia.cr/2002/031
License
https://creativecommons.org/licenses/by/4.0/

BibTeX

@misc{cryptoeprint:2002/031,
      author = {Palash Sarkar and Paul J.  Schellenberg},
      title = {A Parallelizable Design Principle for Cryptographic Hash Functions},
      howpublished = {Cryptology {ePrint} Archive, Paper 2002/031},
      year = {2002},
      url = {https://eprint.iacr.org/2002/031}
}
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