Paper 2014/734 Original: eprint.iacr.org/2014/734 ↗
S-box pipelining using genetic algorithms for high-throughput AES implementations: How fast can we go?
Abstract
In the last few years, several practitioners have proposed a wide range of approaches for reducing the implementation area of the AES in hardware. However, an area-throughput trade-off that undermines high-speed is not realistic for real-time cryptographic applications. In this manuscript, we explore how Genetic Algorithms (GAs) can be used for pipelining the AES substitution box based on composite field arithmetic. We implemented a framework that parses and analyzes a Verilog netlist, abstracts it as a graph of interconnected cells and generates circuit statistics on its elements and paths. With this information, the GA extracts the appropriate arrangement of Flip-Flops (FFs) that maximizes the throughput of the given netlist. In doing so, we show that it is possible to achieve a 50 % improvement in throughput with only an 18 % increase in area in the UMC 0.13 um low-leakage standard cell library.
Metadata
- Available format(s)
PDF- Category
- Implementation
- Publication info
- Preprint.
- History
- 2014-09-19: last updated
- 2014-09-19: published
- Short URL
- https://ia.cr/2014/734
- License
- https://creativecommons.org/licenses/by/4.0/
BibTeX
@misc{cryptoeprint:2014/734,
author = {Lejla Batina and Domagoj Jakobovic and Nele Mentens and Stjepan Picek and Antonio de la Piedra and Dominik Sisejkovic},
title = {S-box pipelining using genetic algorithms for high-throughput AES implementations: How fast can we go?},
howpublished = {Cryptology {ePrint} Archive, Paper 2014/734},
year = {2014},
url = {https://eprint.iacr.org/2014/734}
}