Paper 2016/1133 Original: eprint.iacr.org/2016/1133 ↗

Implementing Complete Formulas on Weierstrass Curves in Hardware

Pedro Maat C. Massolino
Joost Renes
Lejla Batina
Abstract

This work revisits the recent complete addition formulas for prime order elliptic curves of Renes, Costello and Batina in light of parallelization. We introduce the first hardware implementation of the new formulas on an FPGA based on three arithmetic units performing Montgomery multiplication. Our results are competitive with current literature and show the potential of the new complete formulas in hardware design. Furthermore, we present algorithms to compute the formulas using anywhere between two and six processors, using the minimum number of parallel field multiplications.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint.
History
2016-12-08: last updated
2016-12-08: published
Short URL
https://ia.cr/2016/1133
License
https://creativecommons.org/licenses/by/4.0/

BibTeX

@misc{cryptoeprint:2016/1133,
      author = {Pedro Maat C.  Massolino and Joost Renes and Lejla Batina},
      title = {Implementing Complete Formulas on Weierstrass Curves in Hardware},
      howpublished = {Cryptology {ePrint} Archive, Paper 2016/1133},
      year = {2016},
      url = {https://eprint.iacr.org/2016/1133}
}
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