Paper 2019/1453 Original: eprint.iacr.org/2019/1453 ↗

Saber on ESP32

Bin Wang
Xiaozhuo Gu
Yingshan Yang
Abstract

Saber, a CCA-secure lattice-based post-quantum key encapsulation scheme, is one of the second round candidate algorithms in the post-quantum cryptography standardization process of the US National Institute of Standards and Technology (NIST) in 2019. In this work, we provide an efficient implementation of Saber on ESP32, an embedded microcontroller designed for IoT environment with WiFi and Bluetooth support. RSA coprocessor was used to speed up the polynomial multiplications for Kyber variant in a CHES 2019 paper. We propose an improved implementation utilizing the big integer coprocessor for the polynomial multiplications in Saber, which contains significant lower software overhead and takes a better advantage of the big integer coprocessor on ESP32. By using the fast implementation of polynomial multiplications, our single-core version implementation of Saber takes 1639K, 2123K, 2193K clock cycles on ESP32 for key generation, encapsulation and decapsulation respectively. Benefiting from the dual core feature on ESP32, we speed up the implementation of Saber by rearranging the computing steps and assigning proper tasks to two cores executing in parallel. Our dual-core version implementation takes 1176K, 1625K, 1514K clock cycles for key generation, encapsulation and decapsulation respectively.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint.
History
2019-12-17: last updated
2019-12-16: published
Short URL
https://ia.cr/2019/1453
License
https://creativecommons.org/licenses/by/4.0/

BibTeX

@misc{cryptoeprint:2019/1453,
      author = {Bin Wang and Xiaozhuo Gu and Yingshan Yang},
      title = {Saber on ESP32},
      howpublished = {Cryptology {ePrint} Archive, Paper 2019/1453},
      year = {2019},
      url = {https://eprint.iacr.org/2019/1453}
}
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