Paper 2023/267 Original: eprint.iacr.org/2023/267 ↗

Proteus: A Pipelined NTT Architecture Generator

Florian Hirner
Ahmet Can Mert
Sujoy Sinha Roy
Abstract

Number Theoretic Transform (NTT) is a fundamental building block in emerging cryptographic constructions like fully homomorphic encryption, post-quantum cryptography and zero-knowledge proof. In this work, we introduce Proteus, an open-source parametric hardware to generate pipelined architectures for the NTT. For a given parameter set including the polynomial degree and size of the coefficient modulus, Proteus can generate Radix-2 NTT architectures using Single-path Delay Feedback (SDF) and Multi-path Delay Commutator (MDC) approaches. We also present a detailed analysis of NTT implementation approaches and use several optimizations to achieve the best NTT configuration. Our evaluations demonstrate performance gain up to $1.8\times$ compared to SDF and MDC-based NTT implementations in the literature. Our SDF and MDC architectures use 1.75× and 6.5× less DSPs, and 3× and 10.5× less BRAMs, respectively, compared to state-of-the-art SDF and MDC-based NTT implementations.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint.
History
2024-03-25: last updated
2023-02-23: published
Short URL
https://ia.cr/2023/267
License
https://creativecommons.org/licenses/by/4.0/

BibTeX

@misc{cryptoeprint:2023/267,
      author = {Florian Hirner and Ahmet Can Mert and Sujoy Sinha Roy},
      title = {Proteus: A Pipelined NTT Architecture Generator},
      howpublished = {Cryptology {ePrint} Archive, Paper 2023/267},
      year = {2023},
      url = {https://eprint.iacr.org/2023/267}
}
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