Paper 2024/1381 Original: eprint.iacr.org/2024/1381 ↗

Reality Check on Side-Channels: Lessons learnt from breaking AES on an ARM Cortex A processor

Harishma Boyapally
Dirmanto Jap
Qianmei Wu
Fan Zhang
Shivam Bhasin
Abstract

Side-channel analysis (SCA) has posed a significant threat to systems for nearly three decades. Numerous practical demonstrations have targeted everyday devices, such as smart cards, cryptocurrency wallets, and smartphones. However, much of the research in the public domain has focused on low-end microcontrollers, limiting our understanding of the challenges involved in attacking more complex systems. In this work, we conduct a reality check on SCA by targeting a high-performance ARM Cortex-A72 out-of-order processor, commonly found in smartphones. We evaluate the practical effort required for key recovery attacks, considering various threat models, from basic to advanced. Our results show that while basic approaches fail, advanced approaches like deep learning-based SCA can successfully recover the secret key. This multi-tier evaluation approach is crucial for comprehensive risk assessment and informed decision-making regarding mitigation strategies, balancing security, performance, and area constraints.

Metadata
Available format(s)
PDF
Category
Attacks and cryptanalysis
Publication info
Preprint.
History
2025-07-15: last updated
2024-09-03: published
Short URL
https://ia.cr/2024/1381
License
https://creativecommons.org/licenses/by/4.0/

BibTeX

@misc{cryptoeprint:2024/1381,
      author = {Harishma Boyapally and Dirmanto Jap and Qianmei Wu and Fan Zhang and Shivam Bhasin},
      title = {Reality Check on Side-Channels: Lessons learnt from breaking AES on an ARM Cortex A processor},
      howpublished = {Cryptology {ePrint} Archive, Paper 2024/1381},
      year = {2024},
      url = {https://eprint.iacr.org/2024/1381}
}
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