Paper 2026/1359 Original: eprint.iacr.org/2026/1359 ↗

Optimization of Hardware Architecture for Quantum Key Distribution

Raja Adhithan Radhakrishnan
Abstract

The main objective of this paper is to acceler ate the post-processing of Quantum Key Distribution (QKD) using an energy-efficient pipelined architecture implemented on a Field-Programmable Gate Array (FPGA). The proposed architecture aims to improve processing speed while efficiently utilizing hardware resources. In addition, this work compares the proposed approach with existing approaches to demonstrate its performance and resource efficiency.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint.
History
2026-07-02: last updated
2026-07-02: published
Short URL
https://ia.cr/2026/1359
License
https://creativecommons.org/licenses/by/4.0/

BibTeX

@misc{cryptoeprint:2026/1359,
      author = {Raja Adhithan Radhakrishnan},
      title = {Optimization of Hardware Architecture for Quantum Key Distribution},
      howpublished = {Cryptology {ePrint} Archive, Paper 2026/1359},
      year = {2026},
      url = {https://eprint.iacr.org/2026/1359}
}
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